The present invention relates in general to integrated circuit design and, more particularly, to sensing process and temperature variation in an integrated circuit (IC) and providing compensation therefor.
A common problem facing circuit designers is variation in operating characteristics of the IC as a function of temperature and process conditions and power supply levels. An IC may operate much faster, say 320 MHz, under best case conditions with low temperature and a high power supply potential. Under worst case conditions with high temperature and a low power supply potential, the IC may achieve only 100 MHz. The manufacturing process also has a direct effect on the ultimate performance of the IC. For example, process variation may effect device gate length, junction depth and gate oxide thickness which make the response unpredictable. The sizing of individual transistors and relative switching thresholds is also dependent upon process and temperature.
The uncertainty in performance hampers accurate calculation of setup and hold times in critical signal paths of the overall circuit design. Furthermore, with an unknown operating environment it is difficult to determine switching thresholds of the input and output buffers which are necessary to interface with external logic families.
Hence, a need exists to compensate an IC for temperature, process and power supply variation and bring a level of certainty to IC design.